module PrjGieGieGowinDualDaStreamer(
    input  sys_rst_n,
    input  sys_clk,
    output sys_sta,
    // Dual DA
    output dac0_clk,
    output dac1_clk,
    output [7:0] dac0_data,
    output [7:0] dac1_data,
    // FT232H
    input usb_clk_60m,
    input usb_rxf_n,
    input [7:0] usb_data,
    output usb_oe_n,
    output usb_rd_n
);

wire [10:0]  bram_rd_addr;
wire [7:0]  bram_rd_data;
wire [10:0]  bram_wr_addr;
wire [7:0]  bram_wr_data;
wire cea; //　write enable
wire ceb = 1'b1; //　读使能，高有效
wire oce = 1'b1; //　时钟输出使能
wire ram_rst = ~sys_rst_n;
wire pll_clk;

ram_scanner u_ram_scanner(
    .sys_rst_n      (sys_rst_n),
    .sys_clk        (sys_clk),
    .pll_clk        (pll_clk),
    .dac0_clk       (dac0_clk),
    .dac1_clk       (dac1_clk),
    .dac0_data      (dac0_data),
    .dac1_data      (dac1_data),
    .usb_clk_60m    (usb_clk_60m),
    .usb_rxf_n      (usb_rxf_n),
    .usb_data       (usb_data),
    .bram_rd_addr   (bram_rd_addr),
    .bram_rd_data   (bram_rd_data)
);

sys_sta_led u_sys_sta(
    .sys_rst_n       (sys_rst_n),
    .sys_clk         (sys_clk),
    .sys_sta         (sys_sta)
);

Gowin_SDPB u_sdpb(
    .dout(bram_rd_data),
    .clka(usb_clk_60m),
    .cea(cea),
    .reseta(ram_rst),
    .clkb(pll_clk),
    .ceb(ceb),
    .resetb(ram_rst),
    .oce(oce),
    .ada(bram_wr_addr),
    .din(bram_wr_data),
    .adb(bram_rd_addr)
);

Gowin_rPLL u_pll(
    .clkout (pll_clk),
    .reset  (~sys_rst_n),
    .clkin  (sys_clk)
);

bram_updater u_bram_updater(
    .sys_rst_n       (sys_rst_n),
    .usb_clk_60m     (usb_clk_60m),
    .usb_data        (usb_data),
    .usb_rxf_n       (usb_rxf_n),
    .usb_oe_n        (usb_oe_n),
    .usb_rd_n        (usb_rd_n),
    .bram_wr_addr    (bram_wr_addr),
    .bram_wr_data    (bram_wr_data),
    .bram_wr_en      (cea)
);

endmodule